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Multimedia Processor
Media Processor
MIPS24Kec Hardcore
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Media Processor-1
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Media Processor-2
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Success Story: MIPS24Kec Hardcore

 
Chip Function
  • MIPS24Kec Hardcore
Design Summary
  • Process: TSMC 65nm (CLN65GPLUS)
  • Standard Cell Library
    - ARM Advantage-HS 12T, V01_2009q1
  • Process Condition
    - Worst Case: 0.9V/ 125C
    - Typ Case: 1V/ 25C
    - Best Case: 1.1V/ 0C
  • Maximum Frequency (Worst Case SI)
    - 890MHz (ideal source clock)
  • Maximum Frequency (Margin include SI)
    - 750MHz 10% OCV derate (ideal source clock)
    - 730MHz 10% OCV derate (inc . 50ps clock jitter)
  • Die size: 3.32 mm^2
Design Challenges
  • High speed design
  • Data-cache/Instruction-cache speed is 750Mhz
    - Use skew optimization to achieve over 850Mhz speed
  • IP hardening model creation