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Success Story:
Low Power Design
| Chip Function |
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| Mobile Image Processing |
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| Design Summary |
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| Design Challenges |
- 30mW for 0.13um down from 300mW for 0.18um
- S/W optimization: from 100mips to 70mips + H/W acceleration
- H/W acceleration: multiplier from 2 cycles to 1 cycle (30mips increase)
- Low power memory IP -> From 1.8V to 0.9V 8Kx16 (from 15mA-20mA to 0.6mA)
- Three power cut off domain with power switch
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