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Success Story:
Flash application
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| Chip Function |
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| Design Summary |
- Fabless company in Taiwan
- Process: TSMC 90LP 1P6M
- Gate count: 470K+17 Macro
- Frequency: 120MHz
- IP :
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Multi-voltage IO,
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Bandgap
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ARM11 hardcore
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| Status: Mass Production |
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| Design Challenges |
- Digital hard core interface timing fix
- Multi voltage IO timing optimization
- RDL power distribution optimization
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